Design and Performance Evaluation of Low-Voltage Solid-State DCCB Using Capacitor-based Surge Mitigation Techniques

Moradian, M; Lie, TT; Gunawardane, K

Design and Performance Evaluation of Low-Voltage Solid-State DCCB Using Capacitor-based Surge Mitigation Techniques

Files

Journal article(7.17 MB)

Date

2025-04-16

Authors

Moradian, M

Lie, TT

Gunawardane, K

Item type

Journal Article

Publisher

Elsevier BV

Abstract

This article conducts practical tests on four different configurations of solid-state DC circuit breakers (SS-DCCBs), investigating fault detection and circuit interruption phenomena in DC systems. It analyses circuit formulations and design principles, compares the topologies, and evaluates results. Since all circuit operation results are considered acceptable, the article scrutinizes circuit configurations and selects the most effective surge absorption technique based on active and passive components and surge mitigation complexity. The primary switch in the proposed models is a MOSFET, while the bypass switches are IGBT and Thyristor. The traditional surge absorption method using Metal Oxide Varistor (MOV) is contrasted with three topologies employing the capacitor current block technique (CBT). Practical testing and discussion of the effects of circuit inductance on switching speed and operation are also included. Real-world modeling incorporating inductance on both the line and load sides is utilized throughout all experiments to assess realistic outcomes. The optimal surge absorption configuration will be chosen based on its ability to meet various criteria, including efficient operation, rapid response, minimal complexity on both power and control sides, and the involvement of active and passive components. The tests were carried out on a system with a 48 V DC supply.