Hardware Implementations of SVM on FPGA: A State-of-the-Art Review of Current Practice
aut.relation.endpage | 752 | |
aut.relation.issue | 11 | en_NZ |
aut.relation.pages | 20 | |
aut.relation.startpage | 733 | |
aut.relation.volume | 2 | en_NZ |
aut.researcher | Gholamhosseini, Hamid | |
dc.contributor.author | Afifi, SM | en_NZ |
dc.contributor.author | Gholamhosseini, H | en_NZ |
dc.contributor.author | Poopak, S | en_NZ |
dc.date.accessioned | 2017-03-07T03:45:48Z | |
dc.date.available | 2017-03-07T03:45:48Z | |
dc.date.copyright | 2015-11 | en_NZ |
dc.date.issued | 2015-11 | en_NZ |
dc.description.abstract | The Support Vector Machine (SVM) is a common machine learning tool that is widely used because of its high classification accuracy . Implementing SVM for embedded real -time applications is very challenging because of the intensi ve computations required. This in creases the attractiveness of implementing SVM on hardware platforms for reaching high performance computing with low cost and power consumption. This paper provides the first comprehensive survey of current literature (2010- 2015) of different hardware implementation s of SVM classifier on Field -Programmable Gate Array (FPGA ). A classification of existing techniques is presented, along with a critical analysis and discussion . A challenging trade -off between meeting embedded real -time systems constraints and high classification accuracy has been observed. Finally , some key future research directions are suggested. | |
dc.identifier.citation | International Journal of Innovative Science, Engineering & Technology, vol.2(11), pp.733 - 752 (20) | en_NZ |
dc.identifier.issn | 2348-7968 | en_NZ |
dc.identifier.uri | https://hdl.handle.net/10292/10369 | |
dc.publisher | International Journal of Innovative Science Engineering and Technology (IJISET) | |
dc.relation.uri | http://ijiset.com/articlesv2/articlesv2s11.html | en_NZ |
dc.rights | The authors confirms that “International Journal of Innovative Science, Engineering and Technology” and its Editors, Chief Editor, or reviewers can publish the article online as open access and authors grant permission to edit or alter the article if necessary. | |
dc.rights.accessrights | OpenAccess | en_NZ |
dc.subject | SVM; FPGA; Hardware implementation; Embedded systems; Image processing | |
dc.title | Hardware Implementations of SVM on FPGA: A State-of-the-Art Review of Current Practice | en_NZ |
dc.type | Journal Article | |
pubs.elements-id | 196742 | |
pubs.organisational-data | /AUT | |
pubs.organisational-data | /AUT/Design & Creative Technologies | |
pubs.organisational-data | /AUT/Design & Creative Technologies/School of Engineering |