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A Modular Multilevel Converter that Integrates Artificial Intelligence for Fault Locating and Protection

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Thesis(3.53 MB)

Date

2023

Authors

Supervisor

Baguley, Craig
Gunawardane, Kosala

Item type

Degree name

Doctor of Philosophy

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Volume Title

Publisher

Auckland University of Technology

Abstract

High Voltage Direct Current (HVDC) transmission has provided a variety of possibilities for renewable energy resources and regional substations to boost power supply reliability and operational flexibility. To accommodate this development and improve power system performance, the Modular Multilevel Converter (MMC) has been comprehensively adopted as a potential converter solution for HVDC applications due to its modularity and scalability. However, challenges such as cost, power losses, faults, regulating AC circulating current and energy balance can hamper their practical applications and deployment, especially in controlling and protecting the MMC-HVDC grid. Furthermore, the most crucial and challenging control issue lies in the inability of the converter to offer DC fault protection, since conventional control schemes always struggle to achieve converter energy balance and DC Fault Ride Through (DC-FRT) capability due to the unbalanced system parameters. Reviewing this research gap, a novel control structure has been proposed in this thesis ensuring a proper dynamic response, balancing the arm and leg internal energies, minimising the oscillations in DC current, offering DC-FRT capability and supporting Static Synchronous Compensator (STATCOM) of AC loads. Moreover, the proposed control scheme is integrated in a novel MMC topology as a means of providing primary protection against fault. Since a DC fault can cause a severe and sudden rise in the converter’s arm current, it will be more detrimental to the Half Bridge (HB) MMCs that lack DC Fault Ride-Through (DC-FRT) capability. Several fault-tolerant converters with DC-FRT capability are surveyed. However, the cost of implementation, power losses, complexity, and controllability of the converters limit their applications. To cut down on the cost and the number of electronic devices, a cascaded hybrid design and an Alternate Arm Converter (AAC) were suggested in literature. However, they require a large number of capacitors and inductors to filter the distortions created by the switching of the MMC’s IGBTs. Furthermore, they cannot provide reactive power compensation in the event of a DC short circuit since all their MMC arms will stop conducting as they clear the fault. Therefore, this thesis proposes a novel single-clamped hybrid-arm MMC topology with STATCOM and DC-FRT capability at reduced losses, cost, and number of electronic devices. Implementing the proposed control system and the novel converter topology could be limited to non-permanent faults. For a DC overcurrent fault that lasts for an extended period (a permanent fault), the converter cannot sustain the grid with reactive power compensation for that long. Thus, the MMC-HVDC systems would struggle to ensure power supply reliability, thereby shutting down the entire HVDC network. As a result, a reliable backup fault location approach is paramount for grid protection and restoration during such a fault impact. The conventional fault location methods still struggle with setting manual protective thresholds and, they are vulnerable to fault resistance and noise. In most cases, they require a communication channel for the fault data which could potentially lead to signal delay and data loss. In Multi-Terminal (MT) HVDC network, locating a fault is challenging due to the poor selectivity and sensitivity of the traditional location schemes. Therefore, this thesis proposes a robust fault location approach based on Bidirectional Long-Short Term Memory (Bi-LSTM) using deep learning. The proposed method is a simplified decision-making model that uses fault features from only one end of the network to eliminate the need for a communication channel. The proposed Bi-LSTM fault location scheme is accurate; however, it is critical to locate faults in a sufficiently fast and more accurate manner. This thesis also presented a faster and robust location scheme to minimize the outage time and costs associated with faults on HVDC transmission lines. Therefore, a novel fault location technique is proposed to integrate support vector machine (SVM) algorithms to reduce the time needed to locate faults through fault classification. After classification, Gaussian Process Regression (GPR) is used for location identification.

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https://hdl.handle.net/10292/16229

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