A generic platform for the evolution of hardware
| aut.embargo | No | en |
| aut.thirdpc.contains | No | |
| aut.thirdpc.permission | No | |
| aut.thirdpc.removed | No | |
| dc.contributor.advisor | Collins, John | |
| dc.contributor.author | Bedi, Abhishek | |
| dc.date.accessioned | 2009-06-15T00:56:03Z | |
| dc.date.available | 2009-06-15T00:56:03Z | |
| dc.date.copyright | 2009 | |
| dc.date.issued | 2009 | |
| dc.description.abstract | Evolvable Hardware is a technique derived from evolutionary computation applied to a hardware design. The term evolutionary computation involves similar steps as involved in the human evolution. It has been given names in accordance with the electronic technology like, Genetic Algorithm (GA), Evolutionary Strategy (ES) and Genetic Programming (GP). In evolutionary computing, a configured bit is considered as a human chromosome for a genetic algorithm, which has to be downloaded into hardware. Early evolvable hardware experiments were conducted in simulation and the only elite chromosome was downloaded to the hardware, which was labelled as Extrinsic Hardware. With the invent of Field Programmable Gate Arrays (FPGAs) and Reconfigurable Processing Units (RPUs), it is now possible for the implementation solutions to be fast enough to evaluate a real hardware circuit within an evolutionary computation framework; this is called an Intrinsic Evolvable Hardware. This research has been taken in continuation with project 'Evolvable Hardware' done at Manukau Institute of Technology (MIT). The project was able to manually evolve two simple electronic circuits of NAND and NOR gates in simulation. In relation to the project done at MIT this research focuses on the following: To automate the simulation by using In Circuit Debugging Emulators (IDEs), and to develop a strategy of configuring hardware like an FPGA without the use of their company supplied in circuit debugging emulators, so that the evolution of an intrinsic evolvable hardware could be controlled, and is hardware independent. As mentioned, the research conducted here was able to develop an evolvable hardware friendly Generic Structure which could be used for the development of evolvable hardware. The structure developed was hardware independent and was able to run on various FPGA hardware’s for the purpose of intrinsic evolution. The structure developed used few configuration bits as compared to current evolvable hardware designs. | |
| dc.identifier.uri | https://hdl.handle.net/10292/651 | |
| dc.language.iso | en | en |
| dc.publisher | Auckland University of Technology | |
| dc.rights.accessrights | OpenAccess | |
| dc.subject | Evolutionary computing | |
| dc.subject | Genetic algorithm code | |
| dc.subject | Genetic programming | |
| dc.subject | EHW | |
| dc.subject | Artificial intelligence | |
| dc.subject | FPGA | |
| dc.title | A generic platform for the evolution of hardware | |
| dc.type | Thesis | |
| thesis.degree.grantor | Auckland University of Technology | |
| thesis.degree.level | Masters Theses | |
| thesis.degree.name | Postgraduate Diploma in Engineering (Research) |