Hardware Implementations of SVM on FPGA: A State-of-the-Art Review of Current Practice
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Abstract
The
Support Vector Machine (SVM) is a common machine
learning tool that is
widely used because of its high classification
accuracy
. Implementing SVM for embedded real
-time
applications is very challenging because of the intensi
ve
computations required. This
in creases the
attractiveness
of
implementing SVM on hardware platforms for reaching high
performance computing
with low cost and power consumption.
This paper provides
the
first comprehensive survey of
current
literature (2010-
2015)
of
different hardware implementation
s of
SVM classifier on
Field
-Programmable Gate Array
(FPGA
).
A classification of existing techniques is presented, along with a
critical analysis and
discussion
. A challenging trade
-off between
meeting embedded
real
-time
systems constraints
and
high
classification
accuracy
has been observed.
Finally
, some
key
future research directions
are
suggested.